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The
sixth IEEE CPMT
International Conference on High Density Microsystem Design and Packaging
and Failure Analysis will cover the following areas and objects:
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High density
design and packaging including micro- and nanosystems, microelectronics
and opto-electronics design and packaging, CSP, BGA, Flip-chip, Chip
on Board, Surface Mount Technology and other novel emerging technology
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High density
substrate including integrated passives and active devices
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MEMS and
MOEMS design, packaging and assembly
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Microsystems
manufacturing issues including cleaning issues, quality control, logistics,
repair, process optimization, statistic process controls, ISO compliance,
tooling or equipment, early manufacturing involvement initiatives
and yield and test innovations used to enhance manufacturing processes
or products related to high density substrates, single chip and multichip
packaging, chip bumping and integrated component technologies
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Component
failure analysis techniques including non-destructive X-ray, ultrasonic
microscopy, IR-microscopy etc
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Simulation
and modelling for packaging and microsystems and microelectronics
manufacturing processes
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Thermal
management
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Environmental
design and materials development including life cycle analysis and
end of life strategy etc
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Cost reengineering,
improvements and analysis for electronics packaging processes and
products
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