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Key Note Speech 1:  Key issues in the Broad Implementation of Flip Chip in Industry

Speaker: William Chen

Key Note Speech 2: Microsystems Packaging from Macro to Nano Scale

Speaker: Rao Tummala, Raj Pulgurtha and Venky Sundaram. Rao Tummala, President of the IEEE-CPMT Society and IMAPS Society, Director of the NSF- Engineering Research Center called PRC at Georgia Tech.

Outline of Speech:

So called “packaging”, in the past, played two roles: 1) Provide  I/O connections to the semiconductor devices so the IC is tested and ready for board assembly. This is called IC packaging; and 2) Integrate components into systems to form end product systems such as cell phones, PDAs, Laptops. This is called systems packaging. 

Both were accomplished by interconnections or wiring at the package or board level.  More recently, the IC devices themselves began to integrate more and more transistors and functions, leading to what the community has been calling SOC or System– on-Chip with multiple systems functions in a single chip. This can be called horizontal or 2D integration of IC blocks toward system-level functionality. The community began to realize, however, that such an approach presents design complexity and fundamental limits for computing, and integration limits for wireless systems, over the long run. This led to 3-D packaging approaches, often referred to as SIP or System-in-Package. Both these are the latest and most leading-edge technologies pushing the IC integration in two and three dimensions, But they both have one major shortcoming.  They depend on CMOS processing and hence are limited by what can achieved with CMOS. The SIP and SOC approaches, while providing major opportunities in both miniaturization and integration for advanced portable and desktop electronic products, are limited by CMOS processes.

A new concept called SOP or System–on–Package – where the package, and not the board, is the entire system – is beginning to address the shortcomings of both SOC and SIP in two ways: Optimize silicon for what it is good for and the package for what it is best at, by means of IC/package/system co-design. While doing so, optimize both for cost, performance, miniaturization and reliability.  The package, in this concept, therefore overcomes both computing limitations and integration limitations of SOC and SIP.  It does this by having global wiring as well as RF and optical component integration in the package level and  not in the chip. The SOP, therefore, includes embedded digital, RF and optical components and functions built into a highly miniaturized package, module or board for emerging convergent systems of tomorrow. This Moore’s Law for systems Integration is akin to Moore’s Law for ICs, pushing component density by  a factor of 100 to 10,000 by means of microscale thin film component integration in the short term  to nanoscale integration in the long term.

Biography of Speaker: Prof. Rao Tummala is a Distinguished and Endowed Chair Professor at Georgia Tech. He is also the Founding Director of the NSF- Engineering Research Center called PRC, pioneering System-On-Package (SOP) vision for Electronic systems of the next decade. Prior to joining Georgia Tech, he was an  IBM Fellow, having pioneered such  major technologies as the first flat panel display based on gas discharge, the first and next two generations of multichip packaging based on 35- layer alumina and 61 layer LTCC with copper and materials for ink-jet printing and magnetic storage.

He received many industry, academic and professional society awards including: Industry Week’s award for improving U.S. competitiveness, David Sarnoff award and Major Education award from IEEE, Dan Hughes award from IMAPS, Engineering Materials Achievement award from ASM-International, Total Excellence in manufacturing award from SME, John Jeppson’s award from the American Ceramic Society as well as the Distinguished Alumni Awards from the University of Illinois, the Indian Institute of Science and Georgia Tech.

Prof. Tummala  published 345 technical papers, holds 71 patents and inventions, authored the first modern packaging reference book (1988) and the first textbook (2001). He is a fellow of IEEE, IMAPS, the American Ceramic Society,  a member of the National Academy of Engineering and was  President of the IEEE-CPMT Society and IMAPS Society.

Key Note Speech 3: Packaging & Board Assembly Technology Trend and Impact on the Supply Chain

Speaker: Dr. Dongkai Shangguan, Director – Advanced Process Technology Flextronics San Jose, CA. Dongkai.Shangguan@Flextronics.Com

Outline of Speech:

This presentation will review the future trend for packaging and board assembly technology and its impact on the supply chain.  Packaging and board assembly technologies are discussed that enable continued miniaturization, functional densification and integration, as well as environmental friendliness, for both small form factor and large form factor electronics products.  The development and implementation of these technologies will have specific and direct impact on the supply chain, including packaging, board assembly materials, processes and equipment.  Fast time-to-market requirement, in combination with low cost and high reliability needs for different product categories, demands ever increasing cooperation throughout the supply chain, with early visibility.

Biography of Speaker:

Dongkai received his BS degree in Mechanical Engineering from Tsinghua University, China, Ph.D. degree in Materials from the University of Oxford, U.K., and MBA degree from the San Jose State University.  He conducted post-doctoral teaching and research at the University of Cambridge and then at The University of Alabama, and worked for 10 years at Ford/Visteon as Senior Technical Specialist and Supervisor of Advanced Electronics Manufacturing.  He is currently Director for Advanced Process Technology at Flextronics.  Dongkai has published 1 book and over 100 papers, has given numerous technical presentations, and is currently working on a new book.  He has 19 U.S. and international patents issued and a number of U.S. and international patents pending.  Dongkai is a senior member of IEEE, and actively participates in professional organizations and consortia, and has chaired technical sessions at numerous conferences.  Dongkai has received a number of recognitions for his contributions to the industry, including the “Outstanding Young Manufacturing Engineer Award” from the Society of Manufacturing Engineers (SME), and the most recent “Soldertec Lead-Free Soldering Award of 2002”.  He is listed in “American Men & Women of Science” and “Who’s Who in America”.  Dongkai can be reached at Dongkai.Shangguan@Flextronics.Com.

Key Note Speech 4: Recent Progress toward Anisotropic Conductive Films in Flat Panel Display and Semiconductor Packaging Applications

Speaker: Itsuo Watanabe, Display Material Division, Hitachi Chemical Co., Ltd., 1150 Goshomiya, Shimodate, Ibaraki 308-8524, Japan

Outline of Speech:

Anisotropic conductive adhesive films(ACFs) are consisted of conducting particles and adhesive resins and have been widely used for packaging technologies in Liquid Crystal Displays for last decades.  So far various ACF interconnection technologies using Chip on Flex and Chip on Glass have been realized to meet the requirement of fine pitch capability and make the flat panel displays and semiconductor packages smaller, lighter and thinner. In this paper, recent progress toward the ACFs with fine pitch capability, high connection reliability and low temperature bonding in flat panel display and semiconductor package applications is described.

Biography of Speaker:

Itsuo Watanabe is currently a Senior Manager, Goshimiya Works of Hitachi Chemical Co., Ltd..   He has been employed by Hitachi Chemical since 1982.   He has been responsible for developing anisotropic conductive films for flat panel displays and flip-chip technologies(chip on glass, chip on flex and PWB).   He had been a visiting scientist of Massachusetts Institute of Technology (Department of Materials Science and Engineering) from 1987 to 1989.   He has also studied on conducting polymers, organic optical recording materials and polymeric materials for optical communication.  He received his BS and MS in Chemistry from Utsunomiya University and PhD in Polymer Science from Kyoto University.   His doctoral research was concerned on syntheses, thin film formation, electrical and optical characteristics of conducting polymers.

Dr. Watanabe is a vice chairman of the organizing and the technical committee of the International Conference on Electronics Packaging.

In 2003, Dr Watanabe received the Award of the Society of Polymer Science, Japan for the Research on Anisotropic Conductive Adhesive Films.